1. Field of the Invention
This invention relates to a method for manufacturing a LED array head to be used as recording light-emitting elements for forming a permanent visible image on a recording medium by means of an electrophotographic recording system and also to a LED array head prepared by using such a method.
2. Related Background Art
Self-scan type LED arrays (to be referred to as xe2x80x9cSLEDsxe2x80x9d hereinafter) are described in Japanese Patent Application Laid-Open Nos. 1-238962, 2-208067, 2-212170, 3-20457, 3-194978, 4-5872, 4-23367, 4-296579 and 5-84971, xe2x80x9cProposal of a Light Emitting Element Array to be used for an Optical Printer Integratedly Comprising a Drive Circuitxe2x80x9d (Japan Hard Copy ""91 (A-17)) and xe2x80x9cSelf-Scan Type Light Emitting Element (SLED) Using a PNPN Thyristor Structurexe2x80x9d (The Institute of Electronics, Information and Communication Engineers (3. 5. ""90)). Such self-scan LED arrays are attracting attention as light-emitting elements to be used for recording purposes.
FIG. 2 of the accompanying drawings is a circuit diagram of a known SLED. FIG. 3 is a timing chart of control signals to be used for turning on all the elements. Now, the configuration and the method of driving the SLED will be described by referring to FIGS. 2 and 3.
Referring firstly to FIG. 2, VGA represents the ground voltage of the SLED and is connected to a plurality of diodes by way of respective resistors, which diodes are cascaded to start pulse xcfx86S. The SLED comprises transfer thyristors S1xe2x80x2 to S5xe2x80x2 arranged in array and light-emitting thyristors S1 to S5 also arranged in array and the gates of the thyristors of each column of the two rows are mutually connected. The gates of the two thyristors of the first column are connected to the signal input section for receiving start pulse xcfx86S, while the gates of the two thyristors of the second column are connected to the cathode of the diode whose anode is connected to the input terminal for receiving start pulse xcfx86S. This arrangement is repeated for the third and fourth columns and so on.
Now, the transfer aspect and the light emission aspect of the SLED will be described by referring to the timing chart of FIG. 3. A transfer operation of the SLED starts when the start pulse xcfx86S is shifted from 0V to 5V. When the start pulse xcfx86S is at 5V and the forward voltage fall of a diode is 1.4V, Va=5V, Vb=3.6V, Vc=2.2V and 0V from Vd onward, while the gate signals of the transfer thyristors S1xe2x80x2 and S2xe2x80x2 are respectively at 5V and 3.7V. When shift pulse xcfx861 is shifted from 5V to 0V under this condition, the transfer thyristor S1xe2x80x2 shows 5V at the anode, 0V at the cathode and 3.7V at the gate so that the transfer thyristor S1xe2x80x2 becomes ON because the requirements for turning ON the transfer thyristor S1xe2x80x2 are satisfied. However, if start pulse xcfx86S is shifted to 0V under this condition, Va5V as the transfer thyristor S1xe2x80x2 is ON. This is because xcfx86S is being applied by way of a resistor and the anode and the gate show a substantially equal potential when the thyristor becomes ON. As a result, the requirements for keeping the first transfer thyristor S1xe2x80x2 ON are satisfied if start pulse xcfx86S becomes equal to 0V so that the first shift operation will be completed. If the light-emitting thyristor drive clock xcfx86I signal is shifted from 5V to 0V under this condition, the condition under which the transfer thyristor is turned ON is regained so that the light-emitting thyristor S1 becomes ON to turn on the first LED. As the first LED is turned on, when the light-emitting thyristor drive clock xcfx86I is made to return to 5V, the anode and the cathode of the light-emitting thyristor S1 no longer shows any potential difference so that the lowest holding current of the thyristor no longer flows and the light-emitting thyristor S1 becomes OFF.
Now, the transfer of the ON condition from the transfer thyristor S1xe2x80x2 to the transfer thyristor S2xe2x80x2 will be discussed below. If the light-emitting thyristor S1 becomes OFF, shift pulse xcfx861 remains to be 0V and hence the transfer thyristor S1xe2x80x2 is held ON so that the gate voltage of the transfer thyristor S1xe2x80x2 is Va5V and that of the transfer thyristor S2xe2x80x2 is Vb=3.7V. When shift pulse xcfx862 is shifted from 5V to 0V under this condition, the transfer thyristor S2xe2x80x2 shows 5V at the anode, 0V at the cathode and 3.7V at the gate so that the transfer thyristor S2xe2x80x2 becomes ON. The transfer thyristor S1xe2x80x2 is turned OFF just as the light-emitting thyristor S1 is turned OFF by shifting shift pulse xcfx861 from 0V to 5V after turning ON the transfer thyristor S2xe2x80x2. Thus, the ON condition is shifted from the transfer thyristor S1xe2x80x2 to the transfer thyristor S2xe2x80x2. Then, the light-emitting thyristor S2 becomes ON as the potential of the light-emitting thyristor drive clock xcfx86I is shifted from 5V to 0V.
The reason why only the light-emitting thyristor that corresponds to the ON transfer thyristor is that the requirements for turning ON a thyristor are not met except the one adjacent to an ON thyristor because the gate voltage of a transfer thyristor that is not ON is equal to 0V. The adjacent thyristor also cannot be turned ON because the potential of the light-emitting thyristor drive clock xcfx86I becomes equal to 3.4V (by which the forward voltage of the light-emitting thyristor falls) as the light-emitting thyristor is turned ON and hence the gate and the cathode of the adjacent thyristor do not show any potential difference.
While the light-emitting thyristor becomes ON and emits light by making the potential of the light emitting thyristor drive clock equal to 0V in the above description, it is necessary to control the light emitting thyristor so as to make it actually emit light with that timing or not according to the applied data in an actual printing operation. In FIG. 3, image data and xcfx86D represents a control signal to be used for this purpose. The logical OR of xcfx86I and the image signal is externally determined for the xcfx86I terminal of the SLED and the potential of the xcfx86I terminal of the SLED is actually made equal to 0V to make the corresponding light emitting thyristor emit light only when the image data is at 0V, while the potential of the xcfx86I terminal of the SLED remains equal to 5V and the corresponding light emitting thyristor does not emit light when the image data is at 5V.
A LED array chip having a configuration as described above may comprise, for instance, 128 light emitting thyristors, which are sequentially controlled and selectively turned ON by means of the corresponding transfer thyristors.
FIG. 4 of the accompanying drawings is a schematic perspective view of a SLED array head, illustrating its configuration.
Referring to FIG. 4, the SLED array head comprises SLED semiconductor chips 211, a base plate 212 which is made of a glass epoxy material or a ceramic material that may be used for printed-wiring boards and carries thereon the SLED semiconductor chips, a signal connector 219 for receiving external control signals and power supplied from an external power source, a power supply connector 220 for receiving power for feeding the array head, a supply circuit 222, a supply cable 221 connecting driver substrate 217 and the supply circuit 222, a lighting control circuit (driver IC) 218 for receiving external control signals and generating lighting control signals for the SLED semiconductor chips 211, bonding wires for connecting output signals xcfx861, xcfx862, xcfx86S, xcfx86I and negative electrode side power input (GND in this example) to the SLED semiconductor chips, a driver substrate 217 carrying thereon the lighting control circuit (driver IC) 218, the signal connector 219 and the power supply connector 220 and a flexible cable 216 connecting the driver substrate and the base plate.
The SLED array head further comprises a positive electrode side power supply wire pattern 214 (+5V in this example) arranged on the base plate 212 and silver paste 215 for electrically connecting the positive electrode side power supply wire pattern 214 arranged on the base plate 212 and the rear side electrodes of the SLED semiconductor chips 211 and firmly anchoring the SLED semiconductor chips 211. Thus, the above electric components are unitized.
The SLED array head comprising the above electric unit is adapted to be used as an optical writing device of an image forming apparatus that comprises an image reading section including a CCD sensor and a printing section for electrophotographically forming images according to the image data sent from the image reading section.
More specifically, a photosensitive drum is primarily charged by means of a charger and an electrostatic latent image is formed on the photosensitive drum according to the image data by means of the SLED array head. Then, the electrostatic latent image is developed to produce a toner image by means of a developing unit and the toner image is transferred onto a recording medium by means of a transfer unit.
The SLED array head is placed in position by fitting the electric unit onto an aluminum support member that can be arranged horizontally highly accurately and machined easily.
FIG. 5 of the accompanying drawings is a schematic cross sectional view of the electric unit of the SLED array head that is fitted to the aluminum support member. In FIG. 5, the same components as those of FIG. 4 are denoted respectively by the same reference symbols, while the aluminum support member is denoted by reference number 512.
In FIG. 5, reference numeral 511 denotes the silicone adhesive that is filled in a slit cut into the aluminum support member 512 from above in order to bond the base plate 212 and the aluminum support member 512 to each other. Since the aluminum support member 512 and the base plate 212 show different expansion coefficients, the base plate 212 can become warped to damage the linear arrangement of the SLED semiconductor chips 211 on the base plate 212 if the aluminum support member and the ceramic base plate are completely rigidly secured to each other by means of an adhesive agent that hardens and the aluminum support member 512 and the base plate 212 expand with different expansion coefficients as a result of temperature change in the ambient air.
Then, in the worst case, the base plate 212 can become cracked. If the linear arrangement of the SLED semiconductor chips 211 is damaged, the scanning lines of the SLED array head can become displaced so that the electrostatic latent image formed on the photosensitive drum would not accurately reflect the image data applied thereto. Normally, the displacement of the SLED semiconductor chips 211 has to be less than 50 xcexcm. Therefore, silicone adhesive that is a resilient adhesive agent is used to bond the aluminum support member 512 and the base plate 212 to each other in order to absorb the difference in the expansion coefficient between the aluminum support member 512 and the base plate 212.
In other words, the silicone adhesive 511 secures the linear arrangement of the SLED semiconductor chips 211.
Since the SLED semiconductor chips 211 emit less light as its temperatures rises, the aluminum support member 512 is used to draw out the heat generated in them. Then, the silicone adhesive 511 that is thermally highly conductive makes the heat generated in the base plate 212 to be also easily drawn to the aluminum support member 512.
FIGS. 6A and 6B of the accompanying drawings show a part of the base plate and a part of the aluminum support member that are used to bond them together. FIG. 6A is a schematic plan view of the SLED semiconductor chips 211 and some other components and FIG. 6B is a schematic cross sectional view taken along line 6Bxe2x80x946B in FIG. 6A. Referring to FIGS. 6A and 6B, slit 611 is filled with the silicone adhesive 511 that bond the base plate 212 and the aluminum support member 512 to each other.
However, silicone adhesive normally requires more than a day for hardening. This means that a SLED array head has to wait a full day on or off the assembly line in a state where the base plate 212 carrying the SLED semiconductor chips 211 is bonded to the aluminum support member 512 before it proceeds to the next step of assembling operation. This is highly inefficient from the assembly point of view and cumbersome because a large space has to be provided for drying. In other words, this problem is a bottle neck for mass production of SLED array heads.
In view of the above identified problem, it is therefore an object of the present invention to provide a method for manufacturing a LED array head that can improve the assembling efficiency and also a LED array head that is manufactured by such a method.
Another object of the present invention is to provide a LED array head whose scanning lines are minimally warped when forming a latent image by exposing a photosensitive drum to scanning light beams.
According to the invention, the above objects and other objects are achieved by providing a method for manufacturing a LED array head comprising:
a step of applying a first adhesive agent showing elasticity after hardening in order to bond a base plate for mounting LED chips and a support member for holding the base plate to each other; and
a step of applying a second adhesive agent showing a hardening rate higher than and an elasticity after hardening lower than the first adhesive agent before the first adhesive agent hardens.
In another aspect of the invention, there is provided a LED array head comprising:
a base plate for mounting LED chips; and
a support member for supporting said base plate;
said base plate being rigidly secured to said support member by means of a first adhesive agent showing elasticity and a second adhesive agent showing an elasticity lower than the first adhesive agent.
Now, the present invention will be described in greater detail by referring to the accompanying drawings.